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Date: Sun, 21 Jan 2024 17:28:32 -0500
From: Rich Felker <dalias@...c.org>
To: musl@...ts.openwall.com
Subject: Re: Draft riscv64 TLSDESC implementation
On Tue, Aug 22, 2023 at 01:38:21PM -0400, Rich Felker wrote:
> The psABI work is not finalized, but based on the current status of
> https://github.com/riscv-non-isa/riscv-elf-psabi-doc/pull/373, I think
> the attached is a valid (but untested) implementation of TLSDESC for
> riscv64. Actually activating it requires also adding the relocation
> type macro to riscv64/reloc.h.
>
> If any rv folks could look it over and make sure I haven't made any
> stupid asm errors or missed any obvious optimizations, that would help
> to quickly get this merged when the psABI is finalized.
>
> Rich
> .text
> .global __tlsdesc_static
> .hidden __tlsdesc_static
> .type __tlsdesc_static,%function
> __tlsdesc_static:
> ld a0,8(a0)
> jr t0
>
> .global __tlsdesc_dynamic
> .hidden __tlsdesc_dynamic
> .type __tlsdesc_dynamic,%function
> __tlsdesc_dynamic:
> add sp,sp,-8
> sd t1,(sp)
> sd t2,8(sp)
>
> ld t2,-8(tp) # t2=dtv
>
> ld a0,8(a0) # a0=&{modidx,off}
> ld t1,8(a0) # t1=off
> ld a0,(a0) # a0=modidx
> sll a0,a0,3 # a0=8*modidx
>
> add a0,a0,t2 # a0=dtv+8*modidx
> ld a0,(a0) # a0=dtv[modidx]
> add a0,a0,t1 # a0=dtv[modidx]+off
> sub a0,a0,tp # a0=dtv[modidx]+off-tp
>
> ld t1,(sp)
> ld t2,8(sp)
> add sp,sp,8
> jr t0
Any feedback on this? Offhand, it looks like adjusting sp by 8 is
wrong and that should be 16. Anything else? Does anyone have recent
enough tooling to test this?
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